5 Things to Know Before Buying Silicon Carbide Filter

10 Mar.,2025

 

The Ins And Outs Of Silicon Carbide - Semiconductor Engineering

John Palmour, CTO at Cree, sat down with Semiconductor Engineering to talk about silicon carbide, how it compares to silicon, what&#;s different from a design and packaging standpoint, and where it&#;s being used. What follows are excerpts of that conversation.

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SE: SiC is well-understood in power electronics and RF, but is the main advantage the ability to run devices hotter than silicon, or is it to save energy?

Palmour: The goal is to save energy and reduce system costs. Silicon carbide saves the OEM money.

SE: Right up front?

Palmour: Yes. For instance, if you say, &#;Okay, I can put in silicon carbide, which is more expensive than an IGBT but I can save three times that on battery cost, that&#;s what they do.&#; More often than not being used for upfront cost.

SE: But that&#;s not necessarily a one-to-one saving on material. It&#;s more about the system cost, right?

Palmour: Yes, absolutely. Silicon carbide is more expensive than silicon IGBTs, and the places we get our wins is where they realize the savings at the system level. It&#;s almost always a system sell.

SE: Has that slowed the adoption of SiC?

Palmour: You have to find the applications where you save money at the system level. But as you do that and start shipping volume, the price comes down and you start opening up other applications. In the past, the limiting factor was the up-front cost, but people are starting to look a lot more at system costs and they realize the up-front cost from that perspective is better with silicon carbide.

SE: How about availability of SiC versus silicon?

Palmour: If you&#;re an automotive OEM, you do worry about capacity because the impact of these automotive designs will be to drive the market to become a lot larger than it is today. Assurance of supply is a concern. That&#;s why Cree announced numerous wafer supply agreements with other companies that make silicon carbide devices. We did an announcement with Delphi, where we sell chips to Delphi and they sell an inverter to a European OEM. Those things are getting looked at, and you have to lock in supply. On these long-term purchase agreements, we have to know that demand will be there before we invest a lot of capital for capacity. We announced last year we&#;re adding $1 billion of CapEx to greatly increase our capacity to meet this need. It&#;s required, and it&#;s just a start. If you run the numbers on the penetration of battery electric vehicles to the overall vehicle market, this is just beginning.

SE: Is this all 200mm, or is it older technology?

Palmour: The bulk of all production today is on 150mm 6-inch wafers. There is still some on 4-inch. We&#;re building a new fab in New York that will be 200mm-capable, but we&#;re not doing any 200mm today and aren&#;t expecting to be ready for that for several years. When 8-inch is ready, we can turn it on. The equipment is all going to be 200mm so that we can rapidly move it over to 8-inch when the time is right. There is no 8-inch in production today.

SE: Is the process radically different from silicon chip manufacturing? Does it utilize the same tools you would normally use?

Palmour: If you&#;re talking materials growth, it&#;s different. Crystal growth is radically different. Wafering, polishing, epitaxy are all quite different. But once you get into the fab, it&#;s fairly standard equipment with the exception of two or three processes, which are heavily tailored to silicon carbide. The fundamental fab processes are very silicon-like, and the bulk of the clean-room equipment is typical silicon equipment.

SE: How about on the test and inspection side?

Palmour: Those are quite similar to silicon.

SE: Because SiC is run at higher temperatures, is defectivity more of a problem?

Palmour: The reason silicon can&#;t go to very high temperatures is because intrinsically it starts to conduct. It really stops being a semiconductor around 175°C, and by 200°C it becomes a conductor. For silicon carbide that temperature is much higher &#; about 1,000°C &#; so it can operate at much higher temperatures. But we&#;re not targeting much higher temperatures than silicon because of the packaging. The higher the temperature at which you rate your package, the larger the delta T between low temp and high temp and the faster your package can degrade. We&#;re not going for radically higher temperature. And in fact, because we&#;re efficient, we actually don&#;t get that hot on a per-square-centimeter basis. Our chips are typically going for about 175°C, which is not all that much higher than silicon.

SE: That puts SiC into the ASIL D category for automotive or industrial applications, right?

Palmour: Yes, absolutely.

SE: What&#;s different on a physics level?

Palmour: Silicon has a bandgap of 1.1 electronvolts, and that is basically the definition of how much energy it takes to rip an electron out of the bond between two silicon atoms. So it takes 1.1 electronvolts to yank an electron out of that bond. Silicon carbide as a band gap of 3.2 electronvolts, and so it takes 3 times more energy. But it&#;s actually an exponential function. A lot of the characteristics of semiconductors bandgap are actually up in the exponent. We&#;ve got three times wider bandgap, but when it comes to electric breakdown we actually have 10 times higher electric breakdown field.

SE: What does that mean in terms of real-world applications?

Palmour: It means that if you make the exact same structure in silicon and silicon carbide &#; the same epi thickness, the same doping level &#; the silicon carbide version will block 10 times more voltage than the silicon version. You can make a MOSFET in silicon and you can make a MOSFET in silicon carbide. MOSFETs in silicon are very common in the low-voltage region, from 10 volts up to about 300 volts. Above 300 volts, the resistance of a silicon MOSFET gets very very high and it makes the MOSFET unattractive. It&#;s too expensive. So what they do is they switch over to a bipolar device. A MOSFET is a unipolar device, meaning there&#;s no minority carriers. There are only electrons flowing in the device. And when it&#;s a unipolar device, it can switch very, very fast. If you look at a 60-volt MOSFET, it switches very fast, and that&#;s, that&#;s why you can make gigahertz processors in silicon. They&#;re very low voltage MOSFETs &#; maybe 5 volts. But when you get up higher in voltage you have to go to a bipolar device, meaning that both electrons and electron holes are flowing in the device at the same time. And every time you switch, you have to dissipate all those electrons and holes recombining and generating energy. The bipolar device gives you much lower resistance and a much smaller, more affordable chip, but you&#;ve got to dissipate that excess heat every time you switch. That&#;s the tradeoff you&#;re making. You can make an affordable power switch, but it&#;s not very efficient.


Fig. 1: SiC MOSFET. Source: Cree

SE: How about with SiC?

Palmour: Silicon carbide has a 10 times higher breakdown field. Our 600-volt MOSFET is going to be as fast as a 60-volt silicon MOSFET. The other way to look at it is if you say 600 volts is the voltage at which you switch from MOSFETs and silicon over to IGBTs, we would be at 10 times higher voltage. So you would use a MOSFET in silicon carbide up to 6,000 volts before you had to switch to an IGBT. The high electric breakdown field that we get from this wide bandgap allows us to use the device type that you would want to use in silicon, but you can&#;t because it&#;s too resistive to make it practical. So you can make the device in silicon carbide that you really wanted in silicon, but due to the physics of silicon it isn&#;t practical in that voltage range.

SE: Does the silicon carbide age the same as silicon due to the higher voltage?

Palmour: It&#;s the same. Voltage doesn&#;t matter. It&#;s the electric field, which is the same regardless of the voltage. Silicon carbide is very rugged, and it doesn&#;t age any differently than any other semiconductor.

SE: Will there be economies of scale as SiC gets used in more places?

Palmour: Yes. It will be a little more asymptotic than Moore&#;s Law because of the thermal considerations, but we are definitely early in the cost-down curve. From to , we expect volume to increase by 30X. That will have an impact.

SE: Any constraints that could disrupt that increase in volume?

Palmour: Silicon carbide is sand and coal. Silicon and carbon are two of the most abundant elements on earth. It&#;s not like indium phosphide or hafnium. I worry more about whether battery electric vehicles can get enough lithium, and whether there are enough rare earths to do the permanent magnet motors. We can make the semiconductors.

SE: We&#;re now seeing much more attention focused on multiple chips in a package. How does SiC behave in those types of packages? Would it necessarily even be in the same package?

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Palmour: In terms of silicon carbide power devices, we have three product lines. One is discrete power devices. So it&#;s a single MOSFET in a TO-247, or a diode in a TO-220 package &#; just a typical standard discrete package. And then we sell chips to other companies that are going to do their own package, but by and large those are module manufacturers. And then we have our own modules. A module includes multiple silicon carbide MOSFET chips in parallel, to get more power, in a very simple circuit. In the most common cases, it&#;s other identical silicon carbide chips in that power module. Let&#;s say you have a 100-amp chip, but you need a power module and an H-bridge configuration that gives you 600 amps. So you&#;d put six 100-amp devices on one side, six 100-amp devices on the other to give you that H-bridge, and then maybe some capacitors or some resistors. That is in the market today. The big issue &#; and what we do a lot of work on and what a lot of the guys working on automotive are working on &#; is if you were to drop our chips into a standard silicon power module package, you&#;d only be getting about half of the performance that the chips could give you because of the built-in inductances. I would equate it to dropping a Ferrari engine into a VW bug chassis.

SE: That sounds like a mismatch.

Palmour: What we and others are working on is how to optimize that module to take full advantage of silicon carbide. We have to build a Ferrari chassis for that engine, and that&#;s what&#;s being worked on in power modules. As for whether it would work with other chips in a package, the answer is yes. Typically today, the drivers and other chips that make up this power module are on a board. Usually it&#;s on a separate board placed right beside that module, but it could be in the same module. It&#;s called an intelligent power module. But you definitely can do the same in silicon carbide.

SE: How about things like noise and drift, which are growing problems in many designs? Is it any different with SiC?

Palmour: There are two parts to that question. In terms of stability of the oxides, there is some drift in silicon carbide. We spend a lot of time working on that minimizing it. It&#;s not a problem once you get it right. It&#;s really mostly time of operation. It will basically shift in the first 10 or 20 hours, and then it will stabilize. And if you turned everything off it would happen again, so the solution is to make that as minimal as possible. In terms of noise, we&#;re not so susceptible to noise like other chips. But because silicon carbide can be operated at such high frequencies, and can switch at really high dv/dt and di/dt, we actually create noise. You have to do your circuit design very carefully to minimize how much noise you generate.

SE: Does shielding help?

Palmour: It&#;s really not shielding as much as it is getting your design right. In silicon, you could put the driver a foot away and pipe a cable and it&#;s no big deal. In silicon carbide you&#;d have so much inductance it would ring like a like a banshee. You have to put the driver up very close to the module to minimize that inductive ringing and reduce noise. You need to keep those inductances minimal.

SE: So this heads into the big problem RF designers are dealing with today, right?

Palmour: Right, and we do both RF and power. When you use silicon carbide, it&#;s pushing you more towards the RF realm than a lot of people in power are used to thinking. RF is a different world. Capacitors become resistors, resistors become capacitors, and everything turns upside down.

SE: But SiC has been used extensively in the RF world, right?

Palmour: Yes, and RF is the other part of our business. There we use SiC as a substrate. We used to sell SiC MESFETs (metal-semiconductor FETs) for RF devices. For Gan RF, 99% of the Gan RF devices out there are done on a silicon carbide substrate.

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Design Considerations for Silicon Carbide Power - Wolfspeed

Silicon carbide (SiC) is a well-established device technology with clear advantages over silicon (Si) technologies, including Si superjunction (SJ) and insulated-gate bipolar transistors (IGBTs), in the 900 V to over 1,200 V high-voltage, high-switching-frequency applications.1 The recent introduction of the 650 V SiC MOSFET products has further broadened SiC use by easily replacing IGBTs, taking a bite out of the Si SJ application share and offering an alternative to gallium nitride (GaN) in the mid-voltage range.

When replacing Si devices with SiC or designing anew with the latter, engineers must consider the different characteristics, capabilities, and advantages of SiC to ensure success. Here is a list of SiC design tips from the power experts at Wolfspeed.

RDS(ON) variance with temperature

A key advantage of SiC is a low RDS(ON) that changes as little as 1.3× to 1.4× over a wide temperature range, whereas in Si or GaN devices, RDS(ON) may double to triple from that rated at 25°C to the practical junction temperatures in the 120°C to 140°C range (Figure 1). It is therefore important to carefully check the datasheet and specify the correct I2R or conduction loss.

No knee voltage

IGBTs are optimized for a thermal design point at the full rated current. Below that point lies the VCE(sat)exponential &#;knee&#; voltage curve (Figure 2). SiC MOSFETs&#; VDS characteristics are linear, offering lower conduction loss at any point lower than the full rated current.

This is particularly useful to bear in mind when designing EV drivetrains, in which the drive cycle is mostly below the full rated power. When used in parallel, the IGBT VCE(sat) curve exacerbates the problem.

Designers must therefore carefully consider where lies their thermal design point and mission profile.

Effective switching frequency

Effective switching frequency (ESF) is defined as the maximum frequency in a hard-switched application that a device can sustain at the rated IC100 with a 50% square-wave duty cycle without exceeding the device&#;s specified maximum power dissipation at working voltage. Or:

Where:

The theoretical ESF of a 40 mΩ Wolfspeed SiC MOSFET compared with that of a 40 mΩ Si device is 10× higher. While this offers a glimpse into SiC&#;s capabilities, cooling, magnetics, and cost put practical limits to switching frequency.

Cooling costs increase, but the passive BoM costs for inductors and capacitors decrease with switching frequency. For IGBTs, the optimum frequency is about 18 kHz, where the cooling and passive BoM savings curves intersect. For SiC MOSFETs, with their lower conduction losses, that sweet spot of cost tradeoffs is at about 60 kHz (Figure 3).

Designers must note that there is a limit to minimizing the inductors, particularly if the system is tied to the grid. And while SiC devices themselves are more expensive than IGBTs, a frequency-optimized design sees a 20% to 25% cost savings at the system level.

Optimizing for applications

The figure of merit (FoM) for a MOSFET is defined by the equation below. The idea behind it is that lower RDS(ON) means lower conduction losses, while lower gate charge, Qg, means lower switching losses. Total losses are minimized if their product, FoM, is minimized.

An examination of the output current and output power versus switching frequency characteristics of two of Wolfspeed&#;s highest-power-density power modules reveals how designers must carefully select the optimal product for their application (Figure 4). The 450 A CAB450M12XM3 module is optimized for very low RDS(ON), but the 400 A CAB400M12XM3 module is optimized for FoM. Over 15 kHz, the 400 A delivers higher current and higher power.

For a motor drive typically operating below 20 kHz, the higher-amperage module is effective, but for solar power inverters switching in the 48 kHz to 60 kHz range, the 400 A module is a better choice.

VDS ruggedness & derating

IGBTs are typically rated at 1.2 kV, with VDS breakdown voltage close to 1.25 kV. Wolfspeed&#;s SiC MOSFETs, while rated at 1.2 kV, typically have breakdown voltages several hundred volts higher. In aerospace applications, in which designers must derate to account for the effects of cosmic radiation, SiC&#;s robustness offers an advantage.

Reverse recovery

Designers may not pay as much attention to it when soft-switching or using asymmetric designs, but reverse recovery (Qrr) is important for symmetrical designs, including buck, boost, and totem-pole PFCs. A Wolfspeed 650 V SiC MOSFET would have an 11-nC Qrr for a reverse-recovery time, Trr, of 16 ns compared with a typical 650 V Si MOSFET that has a 13 μC Qrr for a Trr of 725 ns.

Kelvin source pin

The Kelvin source pin &#; a Kelvin connection that is as close as possible to the source connection of the MOSFET die &#; is used to mitigate inductance due to internal bond wires of the MOSFETs. To maintain the high switching frequency advantage of SiC devices, the Kelvin source pin is critical.

The Kelvin source pin also affects switching loss. For instance, at 30 A IDS, the total switching loss in a TO-247-3 SiC MOSFET with no Kelvin pin and 12 nH source inductance is close to 430 μJ (Figure 5). The same product in a TO-247-4 package &#; with a Kelvin source pin &#; has merely 150 μJ of switching loss at the same IDS. Moving to a smaller package like the TO-263-7 or the surface-mount D2PAK-7 further reduces the inherent source inductance and the losses.

Gate drive considerations

When driving SiC MOSFETs, designers must remember that a negative gate drive is needed to ensure a hard turnoff, unlike with silicon, in which a positive gate drive is used to turn on the device. Other SiC-specific factors to remember include:

  • Faster dV/dt and rated common-mode transient immunity (CMTI) of >100 kV/μs
  • Peak continuous working voltage (VIORM) of up to 1.7 kV
  • Driving capability that is generally higher power and up to 10 A
  • Propagation delays and channel mismatch time typically <10 ns
  • Active Miller clamp requirement because of higher switching speeds and a slightly lower threshold at 2 V
  • A fast short-circuit protection because of smaller SiC die size (<1.8 μs)

Beyond this, driving SiC devices is much like driving Si-based devices.

Dealing with EMI

Because target switching frequencies are usually higher for SiC devices, and their rise and fall times are much shorter than those of Si products, engineers may be inclined to believe that this would cause greater EMI issues.

However, there is no effect on the low-frequency noise or the differential mode EMI filter size required compared with Si. While there is an effect on the conduction mode noise on the input terminal, it is only in the megahertz range. This high-frequency EMI can be attenuated, just like with Si-based devices, by using high-frequency material and capacitor for EMI suppression.

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